SDCLKEN=DISABLE, CLKGSEL=DIV, INTCLKS=NOT_READY, INTCLKEN=OFF
Clock Control
| INTCLKEN | Internal Clock Enable 0 (OFF): Stop 1 (ON): Oscillate |
| INTCLKS | Internal Clock Stable 0 (NOT_READY): Not Ready 1 (READY): Ready |
| SDCLKEN | SD Clock Enable 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CLKGSEL | Clock Generator Select 0 (DIV): Divided Clock Mode 1 (PROG): Programmable Clock Mode |
| USDCLKFSEL | Upper Bits of SDCLK Frequency Select |
| SDCLKFSEL | SDCLK Frequency Select |